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Statistics for Nanoscale ICs

At the nanoscale, nothing is deterministic. Every circuit behavior we want to model is a messy smear of correlated probability. This creates major problems when trying to design modern integrated circuits. Spatial variation – differences in the behavior of our designs based on where they are, how close they are – is a huge problem. Things vary at the level of individual transistors, functional blocks, chips, wafer, and lots (different sets of wafers all manufactured together). Where do we look for methods to attack such problems?   It turns out that there’s a huge range of useful sources in applied math and computer science: Computational Finance, Extreme Statistics Interval Methods, Sparse Regression, Bayesian methods from machine Learning (ML), to name a few. We’ve deployed and innovated on these themes to build a wide range of useful predictive statistical models.

Key Papers

  1. Jun Tao, Wangyang Zhang, Xin Li, Frank Liu, Emrah Acar, Rob A. Rutenbar, Ronald D. Blanton, Xuan, Zeng, “Efficient Process Variation Characterization by Virtual Probe,” chapter in Machine Learning in VLSI Computer Aided Design, Eds. Ibrahim Elfadel and Duane S. Boning, Springer Cham, 2019. ISBN 978-3-030-04666-8.
  2. Wangyang Zhang, Karthik Balakrishnan, Xin Li, Duane Boning, Sharad Saxena, Andrzej Strojwas and Rob A. Rutenbar, “Efficient Spatial Pattern Analysis for Variation Decomposition via Robust Sparse Regression,” IEEE Trans. On CAD, vol 32, no. 7, July 2013. 
  3. Wangyang Zhang, Xin Li, Sharad Saxena, Andrzej Strojwas, R.A. Rutenbar “A Methodology for Automatic Clustering of Wafer Spatial Signatures,” Proc. ACM/IEEE Design Automation Conference, June 2013. 
  4. Wangyang Zhang, Karthik Balakrishnan, Xin Li, Duane Boning, Emrah Acar, Frank Liu and Rob A. Rutenbar, “Spatial Variation Decomposition via Sparse Regression,” Proc .IEEE  International Conference on Integrated Circuit Design & Technology (ICICDT), invited, June 2012.
  5. Wangyang Zhang, Xin Li, Frank Liu, Emrah Acar,  Rob A. Rutenbar, R. Shawn Blanton, “Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated Circuits,” IEEE Trans. On CAD, Vol. 30, No. 12, pp. 1814 – 1827, December 2011. (Winner of 2013 IEEE Donald O. Pederson Best Paper Award for Transactions on CAD.)
  6. W. Zhang, K. Balakrishnan, X. Li, D. Boning, R.A. Rutenbar, “Toward efficient spatial variation decomposition via sparse regression,” Proc ACM/IEEE International Conference on CAD (ICCAD), pp. 162-169, November 2011.
  7. Jiajing Wang, Amith Singhee, Rob A. Rutenbar, Benton H. Calhoun, “Two Fast Methods for Estimating the Minimum Standby Supply Voltage for Large SRAMs,” IEEE Transactions on CAD,  VOl. 29, No. 12, pp. 1908-1920, December 2010.
  8. Amith Singhee and Rob A. Rutenbar, “Why Quasi-Monte Carlo is Better Than Monte Carlo or Latin Hypercube Sampling for Statistical Circuit Analysis,” IEEE Transactions on CAD, Vol. 29, No. 11, pp. 1763-1776, November 2010.
  9. Wangyang Zhang, Xin Li, Emrah Acar, Frank Liu, Rob A. Rutenbar, “ Multi-Wafer Virtual Probe: Minimum-cost variation characterization by exploring wafer-to-wafer correlation,” Proc. ACM/IEEE International Conference on CAD (ICCAD), pp. 47-54, November 2010. 
  10. Wangyang Zhang, Xin Li and Rob A. Rutenbar, “Bayesian Virtual Probe: Minimizing variation characterization cost for nanoscale IC technologies via Bayesian inference,” Proc. ACM/IEEE Design Automation Conference (DAC), pp. 262-267, July 2010. (Winner of 2010 DAC Best Paper Award.) 
  11. Amith Singhee and Rob A. Rutenbar, eds., Extreme Statistics in Nanoscale Memory Design, 273pp, Springer, 2010. ISBN: 1441966056.
  12. Robert C,. Aitken, Amith Singhee and Rob A. Rutenbar, “Extreme Value Theory: Application to Memory Statistics,” Chapter 8 in Extreme Statistics in Nanoscale Memory Design, Amith Singhee and Rob A. Rutenbar (Eds.), pp. 203-240, Springer, 2010. ISBN: 1441966056.
  13. Amith Singhee, Rob A. Rutenbar, “Statistical Blockade: Estimating Rare Event Statistics for Memories”, Chapter 9 in Embedded Memories for Nano-Scale VLSIs, Integrated Circuits and Systems Series, Springer, Kevin Zhang (Ed.), pp 329-382, 2009, ISBN: 1441946942.
  14. Amith Singhee and Rob A. Rutenbar, Novel Algorithms for Fast Statistical Analysis of Scaled Circuits, 201pp, Springer (Lecture Notes in Electrical Engineering), 2009. ISBN: 9048130999.
  15. Xin Li, Rob A. Rutenbar, R. Shawn Blanton, “Virtual Probe: A Statistically Optimal Framework for Minimum-Cost Silicon Characterization of Nanoscale Integrated Circuits,”  Proc. ACM/IEEE International Conference on CAD (ICCAD),  pp. 433-440, November 2009. 
  16. A. Singhee and R.A. Rutenbar, “Statistical Blockade: Very Fast Statistical Simulation and Modeling of Rare Circuit Events and Its Application to Memory Design,” IEEE Trans. On CAD, Vol. 28, No. 8, pp. 1176-1189, August 2009. (Winner of 2011 IEEE Donald O. Pederson Best Paper Award for Transactions on CAD.)
  17. A. Singhee, C.F. Fang, J.D. Ma and R.A. Rutenbar, “Probabilistic Interval-Valued Computation: Toward a Practical Surrogate for Statistics Inside CAD Tools,” IEEE Transactions on CAD, Vol: 27 , No: 12, pp. 2317-2330, December 2008. 
  18. A. Singhee, S. Singhal, R. A. Rutenbar, “Practical, Fast Monte Carlo Statistical Static Timing Analy­sis: Why and How,” Proc.ACM/IEEE 2008 International Conference on CAD, November 2008.
  19. A. Singhee, S. Singhal, R. A. Rutenbar, “Exploiting Correlation Kernels for Efficient Handling of Intra-Die Spatial Correlation, with Application to Statistical Timing,” Proc. Design Automation and Test in Europe Conference (DATE), March 2008.
  20. Benton H. Calhoun, Yu Cao, Xin Li, Ken Mai, Lawrence T. Pileggi, Rob A. Rutenbar and Kenneth L. Shepard, “Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS,” Proceedings of the IEEE, Vol. 96, No. 2, pages 343-365, February 2008.
  21. A. Singhee, J. Wang, B. H. Calhoun, R. A. Rutenbar, “Recursive Statistical Blockade: Recursive Statistical Blockade: An Enhanced Technique for Rare Event Simulation with Application to SRAM Circuit Design,”  Proc. 2008 International Conference on VLSI, January 2008.
  22. J. Wang, A. Singhee, R.A. Rutenbar, B. H. Calhoun, “Modeling the Minimum Standby Supply Volt­age of a Full SRAM Array,” Proc. European Solid State Circuits Conference (ESSCIRC), October 2007.
  23. James D. Ma and Rob A. Rutenbar, “Interval-Valued Reduced Order Statistical Interconnect Model­ing,”   IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 26, No. 9, Sept. 2007.
  24. Amith Singhee and Rob A. Rutenbar, “Beyond Low-Order Statistical Response Surfaces: Latent Variable Regression for Efficient, Highly Nonlinear Fitting,” Proc. ACM/IEEE Design Automation Conference, June 2007.
  25. Amith Singhee and Rob A. Rutenbar, “Statistical Blockade: A Novel Method for Very Fast Money Carlo Simulation of Rare Circuit Events, and its Application," ,"  Proceedings of the 10th Conference on Design, Automation and Test in Europe (DATE 06), April 2007. (Winner, DATE2007 Best Paper.)
  26. Amith Singhee and Rob A. Rutenbar, “From Finance to Flip Flops:  A Study of Fast Quasi-Monte Carlo Methods from Computational Finance Applied to Statistical Circuit Analysis,” Proc. IEEE 8th International Symposium on Quality Electronic Design (ISQED), March 2007.
  27. Amith Singhee, Claire F. Fang, James D. Ma, Rob A. Rutenbar, “Probabilistic Interval-Valued Com­putation: Toward a Practical Surrogate for Statistics Inside CAD Tools,” Proc. ACM/IEEE Design Automation Conference, July 2006.
  28. James D. Ma and Rob A. Rutenbar, “Fast Interval-Valued Statistical Modeling of Interconnect and Effective Capacitance,”  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 4, April 2006.
  29. James D. Ma, Claire F. Fang, Rob A. Rutenbar, Xiaolin Xie, Duane S. Boning, “Interval Valued Modeling of Oxide Chemical-Mechanical Polishing,”  Proc. ACM/IEEE International Conference on CAD (ICCAD'05), Nov. 2005.
  30. James D. Ma, Rob A. Rutenbar, “Fast Interval-Valued Statistical Interconnect Modeling and Reduc­tion,” Proc. ACM Int’l Symposium on Physical Design, April 2005.
  31. James D. Ma, Rob A. Rutenbar, “Interval-Valued Reduced Order Statistical Interconnect Modeling” Proc. ACM/IEEE Int’l Conference on CAD, Nov. 2004.