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PhD Students and Group Alums

  • Adel Ejjeh (Illinois), now Member of the Technical Staff at Intel, PhD Thesis: Compiler Techniques for Enabling General-Purpose Hardware-Agnostic FPGA Programming, 2022.
  • Tianqi Gao (Illinois), now RTL/ASIC Engineer in Apple Silicon Engineering Group, PhD Thesis: A Pixel Parallel Architecture for Graph Cuts Inference, 2020.
  • Sunwoong Kim (Illinois), now Assistant Professor of EE, University of Washington Bothell, Illinois Post-Doc: Hardware accelerators for ML, with focus on privacy preserving learning via homomorphic encryption, 2017-2019.
  • Glenn Ko (Illinois), now Founder and CEO of startup Stochastic.ai. and Research Associate of EECS at Harvard University. PhD Thesis: Sampling Architectures for Probabilistic Inference, 2017.
  • Jungwook Choi (Illinois), now Assistant Professor, Dept of Electronic Engineering, Hanyang University, Seoul, South Korea, PhD Thesis: High Performance and Error Resilient Probabilistic Inference System for Machine Learning, 2015.
  • Daniel McFarlin (CMU), now Member of the Technical Staff at NVIDIA, PhD Thesis: (Joint with Craig Zilles at Illinois) Exploiting Front-End Dynamics to Enhance Static Scheduling, 2015.
  • Abner Guzmán-Rivera (Illinois), now Director of Artificial Intelligence at Kroll Government Solutions in NYC, PhD Thesis: Multi-Output Structured Learning, 2014.
  • Wangyang Zhang (CMU), now Staff Software Engineer at Google, PhD Thesis (with Prof Xin Li): IC Spatial Variation Modeling: Algorithms and Applications, 2012.
  • Jeffrey Johnston (CMU), now at the US National Security Agency (NSA), PhD Thesis: A High-Rate, Low-Power, Hardware Architecture for Speech Recognition Using Finite State Transducers, 2012.
  • Patrick Bourke (CMU), now at Intel in Exascale group, PhD Thesis: A Low-Power Hardware Architecture for Speech Recognition Search, 2011.
  • Kai Yu (CMU), now at Intel, PhD Thesis: Hardware Optimization and Exploration of Feature Extraction and Feature Scoring for Speech Recognition, 2009.
  • Amith Singhee (CMU), now Director, IBM Research India & CTO IBM India and South Asia, PhD Thesis: Novel Algorithms for Fast Statistical Analysis of Scaled Circuits, 2008.
  • Edward C. Lin (CMU), now Principal SW Engineering Manager at Microsoft, Beijing, PhD Thesis: A High Performance Custom Hardware Backend Search Engine for a Speech Recognition System, 2007.
  • James D. Ma (CMU), now at Graham Capital Management (hedge fund) in San Francisco, PhD Thesis: An Interval Valued Computation Methodology for Statistical Retrofitting of Existing Circuit and Technology CAD Tools, 2006.
  • Zhong Xiu (CMU), now Technical Lead Manager at Google, PhD Thesis: The Design and Implementation of a Large-Scale Placer Based on Grid-Warping, 2006.
  • Saurabh Tiwary (CMU), now Corporate Vice President, Microsoft Turing & Advisor, Microsoft Ventures Fund (M12), PhD Thesis: Scalable Trajectory Methods for On Demand Analog Macromodel Extraction, 2006.
  • Claire Fang (CMU), now Chief Product Officer at Seekout, PhD Thesis: Probabilistic Interval Valued Computation: Representing and Reasoning about Uncertainty in DSP and VLSI Design, 2005.
  • Hongzhou Liu (CMU), now Senior Director of Engineering at Synopsys, PhD Thesis: Macromodeling by Data Mining in Large Analog Design Spaces, 2004.
  • Hui Xu (CMU), now Member of Consulting Staff at  Cadence Design Systems, PhD Thesis: sub-SAT: A Formulation for Relaxed Boolean Satisfiability and Its Applications, 2004.
  • Prakash Krishnan (CMU) (formerly “Gopalakrishnan”), now Senior Software Development Manager AWS AI/ML at Amazon, Web Services, PhD Thesis: Direct Transistor Level Layout for Digital Blocks, 2003.
  • Gi-Joon Nam (U. Michigan), now Research Staff Member and Manager, IBM T.J. Watson Research Center, PhD Thesis (joint with Karem Sakallah of UM): A Boolean Layout Approach and Its Application to FPGA Routing, 2001.
  • Rodney Phelps (CMU), now Senior Director of Software Development, NetSuite/Oracle, PhD Thesis: Analog Circuit Synthesis in an Industrial Design Flow, 2001.
  • Michael Krasnicki (CMU), now Chief Software Architect & Strategist, Krasamo Inc., PhD Thesis: A Methodology for Distributed Simulation-Based Synthesis of Custom Analog Circuits, 2000.
  • Pascal Meier (CMU), most recently, Principal Member of the Technical Staff at Maxim Integrated, PhD Thesis: Analysis and Design of Low-Power Multipliers, 1999.
  • Rony Kay (CMU), founder and former CEO of cPacket, Inc. PhD Thesis: Algorithmic Approach to Design and Optimization of VLSI Interconnect, 1999.
  • Mehmet Aktuna (CMU), now at Google, PhD Thesis: Layout Algorithms for Radio Frequency Circuits, 1999.
  • Bulent Basaran (CMU), most recently at Synopsys, PhD Thesis: Techniques for Optimal Diffusion Sharing in CMOS Analog and Digital Circuits, 1997.
  • Gary Ellis (CMU), now Senior Engineer at Marvell Technology, PhD Thesis: The Physical Design of Clock Circuits, 1997.
  • Sujoy Mitra (CMU), now FPGA Software Engineering Manager at Intel Corporation, PhD Thesis: Substrate-Aware Floorplanning for Mixed-Signal ASICs, 1995.
  • Sudip Nag (CMU), now Corporate Vice President (Software & AI) at Xilinx, PhD Thesis: Performance-Directed Simultaneous Place and Route for Field Programmable Gate Arrays, 1995.
  • Emil Ochotta (CMU), now Principal Software Engineer, Digital Privacy Officer (DPO), and Lead of Privacy Governance at Google, PhD Thesis: Automatic Synthesis of High- Performance Analog Circuits in ASTRX/OBLX, 1994.
  • Balsha Robert Stanisic (CMU), now Senior Software Engineer at Siemens, PhD Thesis: Power Distribution Synthesis for Analog and Mixed-Signal ASICs in RAIL, 1993.
  • Rajeev Jayaraman (CMU), now Senior Director of Software Engineering at Microchip Technology Inc., PhD Thesis: Massively Parallel Approaches to VLSI Layout Synthesis, 1991.
  • John Cohn (CMU), now IBM Fellow Emeritus - MIT-IBM Watson AI Lab at IBM, PhD Thesis: Device-Level Placement of Custom Analog Cells in KOAN, 1991.
  • David Garrod (CMU), now Associate General Counsellor, Medallia; previously VP and General Counsel at Voci Technologies, PhD Thesis: Device-Level Routing of Analog Cells in ANAGRAM II, 1991.
  • Erik Carlson (CMU), most recently Founder of Financial Engineering and Technology Group LLC (financial tech startup), PhD Thesis: Exploiting Massive Parallelism in VLSI Mask Verification, 1989.
  • Saul Kravitz (CMU), now Principal Engineer (Life Sciences), MITRE, PhD Thesis (advised jointly with Randy Bryant): Massively Parallel Switch-Level Simulation: A Feasibility Study, 1989.
  • Ramesh Harjani (CMU), now E.F Johnson Professor of ECE at U. Minnesota, PhD Thesis: OASYS: A Framework for Analog Circuit Synthesis, 1989.
  • Dorothy Setliff (CMU), now Visiting Professor at DeVry, PhD Thesis: Knowledge-Based Synthesis of Custom VLSI Router Software, 1989.